Alcatel Lucent 3AL79092AA P63E1 for Alcatel transmission equipment 1660SM 1662SMC Product Description: The P63E1 is a bidirectional unit which interfaces 63 plesiochronous 2048 kbit/s signals and the STM4-BPF signal. We have a new stock of all parts in the Alcatel 1670SM/1678MCC/1660SM/1662SM/1642 EMC/1646SM/1646SMC series. We have a professional import and export team to help you quickly handle customs clearance. If you only need hardware, please send us the part model and the BOM number. If you have network design requirements, please send us the following information: 1. Number of network sites. 2. Network Site Topology. 3. Fibre-optical distance and attenuation. 4. Type and number of service ports. 5. Protection type. 6,Future network expansion requirement. The P63E1 is a bidirectional unit which interfaces 63 plesiochronous 2048 kbit/s signals and the STM4-BPF signal (BPF=backpanel format). Due to the backpanel format (STM-4-BPF or STM-4*), the 63 plesiochronous 2 Mbit/s signals that can be housed in an STM-1 frame, are dropped / inserted in the AU4#1 of the STM-4* frame. The unit is composed by the following blocks: (G.A.) G.A. is an ASIC (or Gate Array) that maps 63 2Mbit/s streams into an STM-1 frame as required by ITU-T G.783 Rec. As the backpanel format for data exchange between 63 x 2 Mbit/s and Matrix card is STM-4*, the 2 Mbit/s streams are inserted/extracted on the AU4 #1 of the STM-4* frame. INPUT side: PPI (E12_TT_Sk and E12/P12x_A_Sk):This block provides the electrical interface between the physical transmission medium and the internal unit format. The received 2048 kb/s line signal is HDB3 coded. A decoder on the physical interface decodes the signal to NRZ (non return-to-zero) format. LPA (S12/P12x_A_So): This block adapts user data for transport in the synchronous domain. For asynchronous user data, lower order path adaptation involves bit justification. The 2.048 Mbit/s is inserted into a C-12 container (by means of asynchronous mapping), which is synchronized (stuffing) with the correspondent TU-12. V5[5-7]:Signal label insertion in the byte V5[5-7]. LPT (S12_TT_So):The LPT function creates a VC-12 by generating and adding POH to a C-12. The POH formats are defined in Recommendations G.708 and G.709. J2:trail trace identifier is generated. V5[1,2]:BIP-2 is calculated and transmitted. V5[3]:the number of errors is encoded in REI. V5[8]:RDI indication is inserted. LTCT So:This block performs Tandem Connection Termination and Adaptation Source functions, according to ITU and ETSI standards, on Low Path tributaries. It inserts into incoming Low order VC the N2 byte, and performs BIP-2 parity compensation for that byte insertion. The inserted N2 is composed by remote signalling, incoming error count, APId. STM-4-BPF I/F (): The STM-1 equivalent signal is multiplexed into the Back-Panel STM-4* equivalent signal. The signal is sent to the Main and Spare MATRIX cards. OUTPUT side: EPS: This block select one of the two signal source provided by the MATRIX cards Main and Spare STM-4-BPF I/F (): The STM-1 equivalent signal is demultiplexed from the Back-Panel STM-4* equivalent signal. Product Details: If you are interested, please let us know the specific model. We will provide the best service and the best price! Pr
