Product Description The SP3S has two functional versions: SL91SP3SVER.B and SL91SP3SVER.C. The SP3D also has two functional versions: TNH1SP3DVER.B and TNH1SP3DVER.C. The difference between VER.B and VER.C is that path indication on the front panel is optimized and the board power consumption is reduced. Application SP3S/SP3D boards receive and transmit E1 services on OptiX RTN 910 NEs that transmit E1 services in native mode. The E1 services come from customer premises or TDM networks. NOTE: For the OptiX RTN 910, configure SP3S/SP3D boards only if E1 ports on system control, switching, and timing boards cannot meet customers requirements. Functions and Features The SP3S receives and transmits 16xE1 signals. The SP3D receives and transmits 32xE1 signals. Table 1 lists the functions and features that the SP3S/SP3D supports. Table 1 Functions and features Function and Feature Description SP3S SP3D Basic functions Receives and transmits E1 signals. Port specifications 75-ohm/120-ohm E1 port 16 32 Clock Clock source Supports a tributary clock source extracted from the first or fifth E1 signal. Clock protection Supports clock protection based on clock source priorities. E1 retiming function Supported OM Loopback Supports inloops and outloops at E1 tributary ports. Cold reset and warm reset Supported PRBS tests at E1 ports Supported Board manufacturing information query Supported Board power consumption information query Supported Working Principle and Signal Flow This section describes how to process one E1 signal, and it serves as an example to describe the working principle and signal flow of the SP3S/SP3D. Functional Block Diagram Figure 1 Functional block diagram of the SP3S/SP3D NOTE: The power supply units on the SP3SVER.C and SP3DVER.C boards do not support conversion from -48 V power into +3.3 V power. Signal Processing in the Receive Direction Table 1 Signal processing in the receive direction of the SP3S/SP3D Step Function Unit Processing Flow 1 Interface unit External E1 signals are coupled by the transformer and then transmitted to the board. 2 Codec unit Equalizes the received signals. Recovers clock signals. Detects T_ALOS alarms. Performs HDB3 decoding. 3 Mapping/Demapping unit Asynchronously maps signals into C-12s. Adds path overhead bytes to C-12s to form VC-12s. Processes pointers to form TU-12s. Performs byte interleaving for three TU-12s to form one TUG-2. Performs byte interleaving for seven TUG-2s to form one TUG-3. Performs byte interleaving for three TUG-3s to form one C-4. Adds higher order path overhead bytes to one C-4 to form one VC-4. 4 Logic processing unit Processes clock signals. Transmits VC-4 signals and pointer indication signals to the main and standby cross-connect units. Signal Processing in the Transmit Direction Table 2 Signal processing in the transmit direction of the SP3S/SP3D Step Function Unit Processing Flow 1 Logic processing unit Processes clock signals. Receives VC-4 signals and pointer indication signals from the cross-connect unit. 2 Mapping/Demapping unit Demultiplexes three TUG-3s from one VC-4. Demultiplexes seven TUG-2s from one TUG-3. Demultiplexes three VC-12s from one TUG-2. Processes path overheads and pointers and detects specific alarms and performance events. Extracts E1 signals. 3 Codec unit Performs HDB3 coding. 4 Interface unit E1 signals are coupled by the transformer and then transmitted to an external cable. Control Signal Processing The board is directly controlled by the CPU unit on the system control and communication unit. The CPU unit issues configuration and query commands to the other units of the board over the control bus. These units then report command responses, alarms, and performance events to the CPU unit over the control bus. The logic control unit decodes the address read/write signals from the CPU unit of the system control and communication unit. Power Supply Unit The power supply unit performs the following functions: Receives two -48 V power supplies from the backplane, converts the -48 V power into +3.3 V power, and then supplies the +3.3 V power to the other units on the board. The power supply units on the SP3SVER.C and SP3DVER.C boards do not support conversion from -48 V power into +3.3 V power. Receives one +3.3 V power supply from the backplane, which functions as a +3.3 V power backup for the other units on the board. Clock Unit This unit receives the system clock from the control bus in the backplane and provides clock signals to the other units on the board. Front Panel There are indicators and E1 ports on the front panel. Front Panel Diagram Figure 1 Front panel of the SP3SVER.B Figure 2 Front panel of the SP3SVER.C Figure 3 Front panel of the SP3DVER.B Figure 4 Front panel of the SP3DVER.C Indicators Table 1 Status explanation for indicators on the SP3S/SP3D Indicator State Meaning STAT On (green) The board is working properly. On (red) The board hardware is faulty. Off The board is not working. The board is not created. There is no power supplied to the board. SRV On (green) The services are normal. On (red) A critical or major alarm occurs in the services. On (yellow) A minor or remote alarm occurs in the services. Off The services are not configured. Ports Table 2 Description of the ports on the SP3S(VER.B and VER.C) Port Description Connector Type Corresponding Cable 1-16 The first to sixteenth E1 ports Anea 96 E1 Cable Connected to the External Equipment or E1 Cable Connected to the E1 Panel Table 3 Description of the ports on the SP3DVER.B
